IC Packaging Glossary

Explore our comprehensive IC Packaging Glossary—your essential guide to key terms and definitions in integrated circuit packaging technology. Perfect for engineers, students, and tech enthusiasts.

1. BGA (Ball Grid Array): A type of surface-mount packaging where spherical bumps are arranged in a grid on the reverse side of the printed circuit board (PCB) to replace traditional leads. An LSI chip is mounted on the front side of the PCB, and the assembly is then encapsulated using molding resin or potting. Also known as Pad Array Carrier (PAC). With potentially over 200 leads, it is used for multi-lead LSIs and can be made smaller than Quad Flat Pack (QFP). For example, a 360-lead BGA with a 1.5mm lead pitch is only 31mm square, while a 304-lead QFP with a 0.5mm lead pitch is 40mm square. BGA avoids lead deformation issues common in QFP. Developed by Motorola, it was first used in devices like portable phones and may become more popular in personal computers in the US. Initially, BGA had a 1.5mm lead pitch and 225 leads. Some LSI manufacturers are now developing 500-lead BGAs. A challenge with BGA is post-reflow soldering visual inspection. Effective methods for this are still unclear. Some believe that due to the larger pitch, connections are stable and can be checked functionally. Motorola refers to molded resin-sealed BGA as OMPAC and potted BGA as GPAC.

2. BQFP (Quad Flat Package with Bumper): A type of QFP with bumpers at the four corners to prevent lead bending during transportation. Mainly used by US semiconductor manufacturers for microprocessors and ASICs. The lead pitch is 0.635mm, with lead counts ranging from 84 to 196.

3. Butt Joint Pin Grid Array: Another name for surface-mount PGA.

4. C- (Ceramic): Indicates ceramic packaging. For example, CDIP stands for Ceramic DIP.

5. Cerdip: A ceramic dual in-line package sealed with glass, used for ECL RAM, DSPs, etc. Cerdip with a glass window is used for UV-erasable EPROMs and microcomputers with internal EPROMs. Lead pitch is 2.54mm, with lead counts from 8 to 42. In Japan, this package is denoted as DIP-G.

6. Cerquad: A surface-mount package, a bottom-sealed ceramic QFP used for packaging logical LSIs like DSPs. Cerquad with a window is used for EPROM packaging. It has better thermal dissipation than plastic QFPs, allowing for 1.5 to 2W of power under natural convection cooling. However, its cost is 3 to 5 times higher than plastic QFPs. Lead pitches include 1.27mm, 0.8mm, 0.65mm, 0.5mm, and 0.4mm, with lead counts from 32 to 368.

7. CLCC (Ceramic Leaded Chip Carrier): A surface-mount package with leads extending from all four sides in a T-shape. Versions with windows are used for UV-erasable EPROMs and microcomputers with internal EPROMs. Also known as QFJ or QFJ-G.

8. COB (Chip on Board): A bare chip mounting technology where semiconductor chips are directly mounted onto the PCB. Electrical connections are made using wire bonding, and resin is applied for reliability. COB is the simplest bare chip mounting technology but has lower packaging density compared to TAB and flip-chip bonding.

9. DFP (Dual Flat Package): Another name for SOP. Now obsolete.

10. DIC (Dual In-Line Ceramic Package): Another name for ceramic DIP (including glass-sealed).

11. DIL (Dual In-Line): Another name for DIP. More commonly used by European semiconductor manufacturers.

12. DIP (Dual In-Line Package): An insertion-type package with leads extending from both sides. Materials include plastic and ceramic. DIP is the most popular insertion-type package used in standard logic ICs, memory LSIs, microcomputer circuits, etc. Lead pitch is 2.54mm, with lead counts from 6 to 64. Package width is typically 15.2mm. Skinny DIP and slim DIP refer to packages with widths of 7.52mm and 10.16mm, respectively, but they are often collectively referred to as DIP. Ceramic DIPs sealed with low-melting glass are also called Cerdip.

13. DSO (Dual Small Out-Line): Another name for SOP. Used by some semiconductor manufacturers.

14. DICP (Dual Tape Carrier Package): A TCP with leads on both sides. Leads are made on an insulating tape and extend from both sides of the package. Due to TAB technology, it is very thin. Commonly used in LCD driver LSIs, but mostly custom-made. Thin memory LSI packages with a thickness of 0.5mm are under development. In Japan, DICP is named DTP according to EIAJ standards.

15. DIP (Dual Tape Carrier Package): Same as above. The Japanese Electronics and Information Technology Industries Association (JEITA) standard name for DTCP.

16. FP (Flat Package): A surface-mount package. Another name for QFP or SOP. Used by some semiconductor manufacturers.

17. Flip-Chip: A bare chip packaging technology where metal bumps are formed on the electrode area of the LSI chip and are then compression-bonded to the electrode area on the PCB. The occupied area is basically the same as the chip size, making it the smallest and thinest of all packaging technologies. However, if the thermal expansion coefficient of the substrate differs from the LSI chip, it can affect connection reliability. Therefore, the LSI chip must be reinforced with resin, and a substrate material with a similar thermal expansion coefficient should be used.

18. FQFP (Fine Pitch Quad Flat Package): A QFP with a fine lead pitch, typically less than 0.65mm.

19. CPAC (Globe Top Pad Array Carrier): Motorola’s term for BGA.

20. CQFP (Quad Flat Package with Guard Ring): A plastic QFP with leads protected by a resin guard ring to prevent bending. Before assembling the LSI onto the PCB, the leads are cut and shaped into gull-wing (L-shape). Produced in volume by Motorola. Lead pitch is 0.5mm, with a maximum of around 208 leads.

21. H- (with Heat Sink): Indicates a package with a heat sink. For example, HSOP stands for SOP with a heat sink.

22. Pin Grid Array (Surface Mount Type): A surface-mount PGA. Traditional PGAs are insertion-type packages with leads about 3.4mm long. Surface-mount PGAs have arrayed leads on the bottom, ranging from 1.5mm to 2.0mm in length. They are attached to the PCB by soldering, hence also called butt joint PGAs. With a lead pitch of only 1.27mm, half of the insertion-type PGA, the package body can be made smaller, but it has more leads (250 to 528), making it suitable for large-scale logical LSIs. Substrate materials include multilayer ceramic substrates and glass epoxy resin printed circuit boards. Multilayer ceramic substrate-based packages are already in practical use.

23. JLCC (J-Leaded Chip Carrier): Another name for windowed CLCC and windowed ceramic QFJ. Used by some semiconductor manufacturers.

24. LCC (Leadless Chip Carrier): A surface-mount package where only electrode contacts are present on the four sides of the ceramic substrate, with no leads. Used for high-speed and high-frequency ICs, also known as ceramic QFN or QFN-C.

25. LGA (Land Grid Array): A package with an array of flat electrode contacts on the bottom. It is inserted into a socket during assembly. Practical ceramic LGAs with 227 contacts (1.27mm pitch) and 447 contacts (2.54mm pitch) are used in high-speed logic LSI circuits. Compared to QFP, LGA can accommodate more input and output pins in a smaller package. Additionally, due to the low impedance of the leads, it is suitable for high-speed LSIs. However, due to the complexity and high cost of socket manufacturing, it is not commonly used. Demand is expected to increase in the future.

26. LOC (Lead On Chip): A type of LSI packaging where the front end of the lead frame is above the chip. Bump welding points are made near the center of the chip, and electrical connections are made using wire bonding. Compared to the traditional structure where the lead frame is placed near the side of the chip, this allows for a chip width of about 1mm in the same-sized package.

27. LQFP (low profile quad flat package) refers to a thin QFP with a package body thickness of 1.4mm. It is the term used by the Japan Electronic Industries Association (JEIA) for the new QFP outline specifications.

28. L-QUAD is one type of ceramic QFP. The packaging substrate uses aluminum nitride, which has a thermal conductivity 7 to 8 times higher than alumina, providing better heat dissipation. The packaging frame uses alumina, and the chip is sealed using the potting method to control costs. It is a packaging type developed for logic LSI and can withstand a power of W3 under natural air-cooling conditions. Packages with 208 pins (0.5mm pitch) and 160 pins (0.65mm pitch) for LSI logic have been developed and have been mass-produced since October 1993.

29. MCM (multi-chip module) refers to a packaging method where multiple semiconductor die are assembled onto a wiring substrate. Based on the substrate material, it can be divided into three main categories: MCM-L, MCM-C, and MCM-D. MCM-L uses conventional glass epoxy multilayer printed circuit boards with relatively low wiring density and lower costs. MCM-C uses thick-film technology to form multilayer wiring with a ceramic (alumina or glass-ceramic) substrate, similar to thick-film hybrid ICs using multilayer ceramic substrates. There is no significant difference between the two, but the wiring density is higher than MCM-L. MCM-D uses thin-film technology to form multilayer wiring with a ceramic (alumina or aluminum nitride) or Si, Al substrate. It has the highest wiring density among the three types but also the highest cost.

30. MFP (mini flat package) is another name for plastic SOP or SSOP (see SOP and SSOP). It is used by some semiconductor manufacturers.

31. MQFP (metric quad flat package) is a classification of QFP according to JEDEC (Joint Electron Device Engineering Council) standards. It refers to standard QFPs with a lead pitch of 0.65mm and a body thickness of 3.8mm to 2.0mm (see QFP).

32. MQUAD (l quad) is a QFP package developed by Olin Corporation in the United States. Both the substrate and the lid are made of aluminum and sealed with an adhesive. It can withstand a power of 2.5W to 2.8W under natural air-cooling conditions. Shin-Kohden Corporation in Japan obtained a license to produce it in 1993.

33. MSP (mini square package) is another name for QFI (see QFI). It was mostly called MSP during the early stages of development. QFI is the term specified by the Japan Electronic Industries Association.

34. OPMAC (over molded pad array carrier) refers to a mold-encapsulated BGA used by Motorola Corporation in the United States (see BGA).

35. P- (plastic) indicates a plastic package. For example, PDIP stands for plastic DIP.

36. PAC (pad array carrier) is another name for BGA (see BGA).

37. PCLP (printed circuit board leadless package) refers to a leadless package for printed circuit boards. It is the term used by Fujitsu for plastic QFN (plastic LCC) (see QFN). The lead pitch comes in two specifications: 0.55mm and 0.4mm. It is currently under development.

38. PFPF (plastic flat package) is another name for plastic QFP (see QFP). It is used by some LSI manufacturers.

39. PGA (pin grid array) refers to a pin grid array package. It is one type of socket-mounted package where the vertical pins on the bottom are arranged in a grid pattern. The substrate material is mostly multilayer ceramic. Unless otherwise specified, it is usually ceramic PGA and is used for high-speed large-scale logic LSI circuits. It has higher costs. The pin pitch is typically 2.54mm, with pin counts ranging from 64 to around 447. To reduce costs, the substrate material can be replaced with glass epoxy printed circuit boards. There are also plastic PGAs with 64 to 256 pins. Additionally, there is a short-pin surface-mount PGA (solder bump PGA) with a pin pitch of 1.27mm (see surface-mount PGA).

40. Piggy back refers to a ceramic package with a socket, similar in shape to DIP, QFP, and QFN. It is used for evaluating programs and confirming operations when developing equipment with microcomputers. For example, an EPROM can be inserted into the socket for debugging. This type of package is mostly custom-made and not widely available in the market.

41. PLCC (Plastic Leaded Chip Carrier): A plastic chip carrier with leads. It is one of the surface-mount package types. The leads extend out from the four sides of the package in a T-shape and are made of plastic. First adopted by Texas Instruments in 64k-bit DRAM and 256k-bit DRAM, it is now widely used in logic LSIs, DLDs (or programmable logic devices), and other circuits. The lead pitch is 1.27mm, with lead counts ranging from 18 to 84. J-shaped leads are less prone to deformation and easier to handle than QFPs, but visual inspection after soldering is more difficult. PLCC is similar to LCC (also known as QFN). In the past, the main difference between them was that PLCC used plastic while LCC used ceramic. However, ceramic J-lead packages and plastic leadless packages (labeled as Plastic LCC, PCLP, P-LCC, etc.) have emerged, making it difficult to distinguish between them. Therefore, in 1988, the Japan Electronics and Information Technology Industries Association (JEITA) decided to call packages with J-shaped leads extending from four sides QFJ and packages with electrode bumps on four sides QFN (see QFJ and QFN).

42. P-LCC (Plastic Leadless Chip Carrier): Sometimes referred to as a plastic QFJ or a QFN (Plastic LCC) (see QFJ and QFN). Some LSI manufacturers use PLCC to represent leaded packages and P-LCC to represent leadless packages for distinction.

43. QFH (Quad Flat High Package): A flat package with leads on four sides and a thick body. It is a type of plastic QFP with a thicker body to prevent cracking (see QFP). Adopted by some semiconductor manufacturers.

44. QFI (Quad Flat I-leaded Package): A flat package with I-shaped leads on four sides. It is one of the surface-mount package types. The leads extend out from the four sides of the package in a downward I-shape. Also known as MSP (see MSP). It is soldered to the printed circuit board through bump bonding. Since the leads have no protruding parts, the footprint is smaller than that of a QFP. Hitachi developed and used this package for video analog ICs. Additionally, Motorola Japan also adopted this package for its PLL ICs. The lead pitch is 1.27mm, with lead counts ranging from 18 to 68.

45. QFJ (Quad Flat J-leaded Package): A flat package with J-shaped leads on four sides. It is one of the surface-mount package types. The leads extend out from the four sides of the package in a downward J-shape. It is a term stipulated by JEITA. The lead pitch is 1.27mm. Materials include plastic and ceramic. Plastic QFJ is often called PLCC (see PLCC) and used in circuits such as microcomputers, gate arrays, DRAMs, ASSPs, and OTPs. Lead counts range from 18 to 84. Ceramic QFJ is also known as CLCC or JLCC (see CLCC). Packages with windows are used for UV-erasable EPROMs and microcontroller chips with EPROMs. Lead counts range from 32 to 84.

46. QFN (Quad Flat Non-leaded Package): A flat package without leads on four sides. It is one of the surface-mount package types and is now mostly referred to as LCC. QFN is a term stipulated by JEITA. Electrode contacts are arranged on the four sides of the package. Due to the absence of leads, the footprint is smaller and the height is lower than that of a QFP. However, when stress occurs between the printed circuit board and the package, it cannot be relieved at the electrode contacts. Therefore, it is difficult to have as many electrode contacts as the leads of a QFP, typically ranging from 14 to around 100. Materials include ceramic and plastic. When marked as LCC, it is mostly ceramic QFN. The electrode contact pitch is 1.27mm. Plastic QFN is a low-cost package using a glass epoxy resin printed circuit board substrate. In addition to the 1.27mm electrode contact pitch, there are also 0.65mm and 0.5mm pitches. This package is also known as Plastic LCC, PCLC, P-LCC, etc.

47. QFP (Quad Flat Package): A flat package with leads on four sides. It is one of the surface-mount package types, with leads extending out from the four sides in a gull-wing (L) shape. Substrates include ceramic, metal, and plastic. Plastic packages account for the majority. Unless otherwise specified, it is mostly plastic QFP. Plastic QFP is the most popular multi-lead LSI package. It is used not only in digital logic LSI circuits such as microprocessors and gate arrays but also in analog LSI circuits such as VTR signal processing and audio signal processing. Lead pitches include 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm, and other specifications. The maximum lead count for the 0.65mm pitch specification is 304. In Japan, QFP with a lead pitch smaller than 0.65mm is called QFP(FP). However, JEITA has re-evaluated the dimensional specifications of QFP, no longer distinguishing based on lead pitch but classifying them into QFP (2.0mm to 3.6mm thick), LQFP (1.4mm thick), and TQFP (1.0mm thick) based on package thickness. Additionally, some LSI manufacturers specifically refer to QFP with a lead pitch of 0.5mm as shrink QFP or SQFP, VQFP. However, some manufacturers also call QFP with lead pitches of 0.65mm and 0.4mm SQFP, causing some confusion in terminology. The disadvantage of QFP is that leads are prone to bending when the lead pitch is less than 0.65mm. To prevent lead deformation, several improved QFP varieties have emerged. These include BQFP with resin buffers on the four corners (see BQFP), GQFP with a resin protection ring covering the front end of the leads (see GQFP), and TPQFP with test bumps inside the package body that can be tested in a special fixture to prevent lead deformation (see TPQFP). In logic LSIs, many development and high-reliability products are packaged in multilayer ceramic QFPs. Products with a minimum lead pitch of 0.4mm and a maximum lead count of 348 have already been introduced. In addition, there are also ceramic QFPs sealed with glass (see Cerquad).

48. QFP(FP) (QFP Fine Pitch): Small pitch QFP. A term stipulated by JEITA. It refers to QFP with lead pitches of 0.55mm, 0.4mm, 0.3mm, and other values smaller than 0.65mm (see QFP).

49. QIC (Quad In-line Ceramic Package): Another name for ceramic QFP. Adopted by some semiconductor manufacturers (see QFP, Cerquad).

50. QIP (Quad In-line Plastic Package): Another name for plastic QFP. Adopted by some semiconductor manufacturers (see QFP).

51. QTCP (Quad Tape Carrier Package): A tape carrier package with leads on four sides. It is one type of TCP package, with leads formed on an insulating tape and extending out from the four sides of the package. It is a thin package utilizing TAB technology (see TAB, TCP).

52. QTP (Quad Tape Carrier Package): A tape carrier package with leads on four sides. A term used by JEITA for the dimensional specifications of QTCP established in April 1993 (see TCP).

53. QUIL (Quad In-line): Another name for QUIP (see QUIP).

54. QUIP (Quad In-line Package): A through-hole package with leads arranged in four columns. The leads extend out from two sides of the package, alternating every other lead and bending downward into four columns. The lead pitch is 1.27mm, which becomes 2.5mm when inserted into the printed circuit board. Therefore, it can be used on standard printed circuit boards. It is a smaller package than the standard DIP. Nippon Electric Company (NEC) has adopted this package for microcontroller chips in desktop computers and home appliances. Materials include ceramic and plastic. The lead count is 64.

55. SDIP (Shrink Dual In-line Package): A shrink DIP. It is one type of through-hole package with the same shape as DIP but a smaller lead pitch (1.778mm) than DIP (2.54mm), hence the name. Lead counts range from 14 to 90. It is also known as SH-DIP. Materials include ceramic and plastic.

56. SH-DIP (shrink dual in-line package) is synonymous with SDIP. It is a term used by some semiconductor manufacturers.

57. SIL (single in-line) is another name for SIP (see SIP). European semiconductor manufacturers often use the term SIL.

58. SIMM (single in-line memory module) refers to a single in-line memory component with electrodes located near one side of the printed circuit board. It typically refers to a component that is inserted into a socket. Standard SIMMs come in two specifications: 30 electrodes with a pitch of 2.54mm and 72 electrodes with a pitch of 1.27mm. SIMMs equipped with SOJ-packaged 1Mbit and 4Mbit DRAMs on one or both sides of the printed circuit board have been widely used in personal computers, workstations, and other devices. At least 30 to 40% of DRAMs are assembled in SIMMs.

59. SIP (single in-line package) is a type of packaging where the leads extend from one side of the package in a straight line. When assembled onto a printed circuit board, the package stands upright. The lead pitch is usually 2.54mm, with lead counts ranging from 2 to 23, most of which are custom products. The shapes of SIPs vary. Some also refer to packages with the same shape as ZIP as SIPs.

60. SK-DIP (skinny dual in-line package) is a type of DIP with a width of 7.62mm and a lead pitch of 2.54mm. It is commonly referred to as DIP (see DIP).

61. SL-DIP (slim dual in-line package) is a type of DIP with a width of 10.16mm and a lead pitch of 2.54mm. It is also commonly referred to as DIP.

62. SMD (surface mount devices) refers to surface-mounted devices. Occasionally, some semiconductor manufacturers categorize SOP as SMD (see SOP).

63. SO (small out-line) is another name for SOP, adopted by many semiconductor manufacturers worldwide (see SOP).

64. SOI (small out-line I-leaded package) is a small outline package with I-shaped leads. It is one type of surface-mounted packaging. The leads extend downward from both sides of the package in an I-shape, with a pitch of 1.27mm. Its footprint is smaller than SOP. Hitachi uses this package for analog ICs (motor drive ICs) with 26 leads.

65. SOIC (small out-line integrated circuit) is another name for SOP (see SOP), adopted by many semiconductor manufacturers abroad.

66. SOJ (Small Out-Line J-Leaded Package) is a small outline package with J-shaped leads. It is one type of surface-mounted packaging. The leads extend downward from both sides of the package in a J-shape, hence its name. It is usually made of plastic and is mostly used for memory LSI circuits such as DRAMs and SRAMs, but mostly for DRAMs. Many DRAM devices packaged in SOJ are assembled onto SIMMs. The lead pitch is 1.27mm, with lead counts ranging from 20 to 40 (see SIMM).

67. SQL (Small Out-Line L-leaded package) is the term used by JEDEC (Joint Electron Device Engineering Council) for SOP (see SOP).

68. SONF (Small Out-Line Non-Fin) is an SOP without a heat sink. It is the same as a regular SOP. To distinguish it from power IC packages with heat sinks, the NF (non-fin) mark is intentionally added. It is a term used by some semiconductor manufacturers (see SOP).

69. SOF (small Out-Line package) refers to a small outline package, one type of surface-mounted packaging where the leads extend from both sides of the package in a gull-wing shape (L-shape). It is made of plastic or ceramic. It is also known as SOL and DFP. Besides being used for memory LSIs, SOP is also widely used in circuits such as relatively small-scale ASSPs. SOP is the most popular surface-mounted package in areas where the number of input and output terminals does not exceed 10 to 40. The lead pitch is 1.27mm, with lead counts ranging from 8 to 44. Additionally, SOP with a lead pitch less than 1.27mm is also called SSOP, and SOP with a mounting height of less than 1.27mm is also called TSOP (see SSOP, TSOP). There is also an SOP with a heat sink.

70. SOW (Small Outline Package (Wide-Type)) refers to a wide-body SOP, a term used by some semiconductor manufacturers.

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