As electronic products continue to enhance their functionality, printed circuit boards (PCBs) become increasingly integrated, and the unit power of devices continues to rise. This is particularly evident in fields such as communications, automobiles, rail transportation, photovoltaics, military applications, aerospace, and more, where devices such as high-power transistors, RF power supplies, LEDs, IGBTs, and MOSFETs are increasingly used. These components are typically packaged in forms such as BGA, QFN, LGA, CSP, and TO, all sharing the characteristics of high power consumption and demanding thermal dissipation performance. Void rates in thermal dissipation pads directly impact product reliability. Due to voids, the mechanical strength of solder joints decreases, thermal resistance increases, and current paths narrow, affecting the thermal conductivity and electrical conductivity of the solder joints, thereby reducing the electrical reliability of the devices.
Specifications such as IPC-A-610, IPC-7095, and IPC-7093 provide detailed descriptions of voiding in solder joints for BGA and BTC-type packaged devices. For collapsible ball grid array (BGA) devices, a void rate standard of 30% is specified, while for other cases, no clear standards exist and must be negotiated between manufacturers and customers. For the ground pads of high-power devices, some users of high-reliability products often require void rates higher than industry standards, further reducing them to 10% or even lower.
Therefore, reducing voids in the solder joints of such SMT devices is one of the key issues in improving product quality and reliability. The industry currently offers various solutions, such as using low-void solder paste, optimizing PCB pad design, adopting stencil aperture arrays, welding in a nitrogen environment, and using preformed solder tabs. However, the final results are not ideal, particularly for large-area ground pads, where it is difficult to stably control the void rate below 10%. After reflow soldering of SMT devices, some voids usually remain in the solder joints. The larger the solder joint area, the larger the void area will be. This is because when the molten solder cools and solidifies, gases generated within the solder do not escape and are “frozen” into voids. The factors influencing void formation are multifaceted, related to the choice of solder paste, device packaging form, pad design, PCB pad surface treatment, stencil aperture method, reflow profile settings, and more.
Omagine’s adoption of vacuum reflow soldering technology can stably achieve a void rate below 3%, making it a highly effective means of addressing void rate issues. Vacuum reflow soldering technology has a significant effect on removing voids in solder joints. Under vacuum conditions, by reasonably setting process parameters, batch production with a void rate below 5% can be stably achieved.